Please use this identifier to cite or link to this item: http://edoc.bseu.by:8080/handle/edoc/85057
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dc.contributor.authorMrozek, I.-
dc.date.accessioned2020-11-12T14:02:14Z-
dc.date.available2020-11-12T14:02:14Z-
dc.date.issued2001-
dc.identifier.citationMrozek, I. Location of pattern sensitive memory faults / I. Mrozek // Информационные сети, системы и технологии = Information Networks, Systems and Technologies : в 3 кн. Кн.1 : Труды международной конференции ICINASTe'2001, Минск, 2-4 октября 2001 г. : на англ. яз. / Ред.: А.Н. Морозевич [и др.]. - Мн. : БГЭУ, 2001. - С. 92-97.ru_RU
dc.identifier.isbn985-426-692-3-
dc.identifier.urihttp://edoc.bseu.by:8080/handle/edoc/85057-
dc.description.abstractThis paper develops the new solution for memory testing based on transparent memory tests in terms of pattern sensitive faults detection. Previous research has outlined that the only march tests can be in use now to test modem memory chips. Their transparent versions are very efficient for the simple fault diagnoses. The solution has been proposed in this paper dealing with extension of know algorithms for the case of pattern sensitive faults. Using the proposed technique it is possible to detect pattern sensitive memory faults with a very high probability. Experimental investigations show the efficiency of the technique for simple faults, as well as for pattern sensitive faults.ru_RU
dc.languageАнглийский-
dc.language.isoenru_RU
dc.publisherБелорусский государственный экономический университетru_RU
dc.subjectmemory testsru_RU
dc.subjectmodem memory chipsru_RU
dc.subjectтестирование памятиru_RU
dc.titleLocation of pattern sensitive memory faultsru_RU
dc.typeArticleru_RU
Appears in Collections:Информационные сети, системы и технологии = Information Networks, Systems and Technologies

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